The present invention relates to a method of manufacturing a semiconductor device which can be applied appropriately to a method of manufacturing a semiconductor device including, e.g., a nonvolatile memory.
As an electrically writable/erasable nonvolatile semiconductor memory device, an EEPROM (Electrically Erasable and Programmable Read Only Memory) has been used widely. Such a memory device represented by a currently widely used flash memory has, under the gate electrode of a MISFET, a conductive floating gate electrode or a trapping insulating film surrounded by an oxide film. A charge stored state in the floating gate or the trapping insulating film is used as stored information, which is read out as the threshold of the transistor. The trapping insulating film indicates an insulating film capable of storing therein charges. Examples of the trapping insulating film that can be mentioned include a silicon nitride film. By the injection/release of charges into/from such a charge storage region, the threshold of the MISFET is shifted to cause the MISFET to function as a memory element. Examples of the flash memory include a split-gate cell using a MONOS (Metal-Oxide-Nitride-Oxide-Semiconductor) film. In such a memory, a silicon nitride film is used as a charge storage region to provide such advantages that, due to discrete storage of charges therein, the data retention reliability thereof is higher than that of a conductive floating gate film, that the higher data retention reliability allows reductions in the thicknesses of oxide films over and under the silicon nitride film, and that a voltage for a write/erase operation can be reduced.
Each of Japanese Unexamined Patent Publications Nos. 2003-332463 (Patent Document 1), 2000-195966 (Patent Document 2), and 2011-187562 (Patent Document 3) discloses a technique related to a nonvolatile semiconductor memory device.